Abstract |
This article shows how fractures in the Si3N4 layer, which comprises the top layer of semiconductor devices encapsulated utilizing a lead-on-chip (LOC) packaging technique, are influenced by changes in the lead-frame materials and thermal-cycling test conditions. Using thermal-cycling tests, it was found that fractures in the Si3N4 layer are the most sensitive to changes in the lead-frame materials at the early stage of thermal-cycling, between -65 ℃ and 150 ℃. Through SEM examinations and stress simulations, this work shows that adopting a copper lead-frame with a CTE-value similar to that of a package body effectively prevents filler-driven Si3N4 damage, providing semiconductor devices with better reliability margins during thermal-cycling.
(Received 14 July, 2022; Accepted 14 November, 2022) |
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Key Words |
semiconductor, chip, stress, fracture, reliability |
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